Advanced R&D Analog Design Engineer / Advanced R&D Analog Design Engineeress

CDI Position Available (100% Immediately or as Agreed)

At Kandou, we are redefining the economics of AI infrastructure. Our mission is to democratize AI by significantly reducing the Total Cost of Ownership (TCO) of hardware systems — a critical barrier to scalable adoption.

Our proprietary MIMO-over-copper technology powers a high-performance, chiplet-based AI memory fabric that is both scalable and energy-efficient. Unlike traditional interconnects, our solution significantly reduces power consumption while preserving high bandwidth and ultra-low latency — unlocking unprecedented efficiency for AI training and inference at scale.

Kandou’s architecture represents not just an incremental improvement but a foundational shift in how AI hardware is built for the future.

Job Title: Analog Design Engineer (Advanced Research and Development Department)

Key Responsibilities:

• Develop block level specifications and models for target designs.
• Model, design, and verify performance of custom analog circuits in advanced technology nodes.
• Conduct layout design and development, including floor-planning, guiding layout engineers, and post-layout verification.
• Perform design verification at different levels (pre- and post-layout, variation-aware).
• Support and collaborate with the design team, including other design and layout engineers, architects, and chip level integration engineers.
• Assist in the post-silicon lab bring-up, debug, characterization, and productization.
• Produce various reports (progress, analysis, design, modeling, and verification).
• Participate in developing concept level architectures and circuits.

Skills:

• Deep understanding of design and layout techniques for high-speed and high-precision circuits, along with excellent problem-solving and analytical skills.
• Proficient in developing testbenches and simulation setups for performance analysis of target circuits and systems.
• Expertise in layout techniques, including matching, parasitic estimation and reduction, and addressing deep-submicron issues.
• Advanced experience with EDA tools for design and verification, preferably Cadence Virtuoso, Spectre/HSpice, and Calibre/PVS for DRC/LVS, parasitic extraction, and modeling.
• Self-motivated, demonstrating a strong sense of ownership and responsibility.
• Ability to manage workload and schedules while effectively reporting to internal management and technical teams.
• Excellent communication and reporting skills.

Experience:

• 5+ years of experience in designing and laying out analog and mixed-signal circuits, particularly in high-speed and high-precision domains, such as multi-gigabit serial data-link transceivers and RF circuits.
• Possession of an MSc or PhD in electronics/electrical engineering (or equivalent).
• Experience with modern semiconductor process technologies, including CMOS 28nm and FinFET 16/14nm, and 7nm.
• Competence in high-level modeling, top-level simulations, and ensuring signal integrity.
• Solid background in Signal Processing and Communications.

If you are interested in this opportunity and wish to be part of a growing company with an exciting future, we encourage you to apply online using the form below. Only applications matching the job profile will be considered.

Together, We Kandou It!