Network Researcher / Network Researcheress

About Huawei

Huawei is a leading global information and communications technology (ICT) solutions provider. Through our unwavering commitment to customer-centric innovation and robust partnerships, we have established superior end-to-end capabilities across the carrier networks, enterprise, consumer, and cloud computing domains. Our products and solutions are deployed in over 170 countries, serving more than a third of the world’s population.

European Research Institute (ERI)

With 28 sites across Europe and 2,000 researchers, Huawei’s European Research Institute (ERI) focuses on fundamental and applied technology research, academic research cooperation projects, and strategic technical planning throughout our network of European R&D facilities. The ERI houses our Research Center (RC) located in Zurich, Switzerland, which features a new lab dedicated to researching the first generation of composable-native computing infrastructure. This initiative emphasizes the unification of scale-up and scale-out fabrics.

The lab's research will be conducted not only by Huawei’s internal research team but also in collaboration with academic partners from universities across Europe, fostering an “open research environment.” This collaborative space encourages academics to engage in long-term research alongside Huawei staff, creating an atmosphere akin to the best universities and research institutes where innovative scientific work can thrive.

Job Opening: Researcher in High Performance Computing Network

We are looking for a highly motivated and visionary researcher to join our team dedicated to High Performance Computing Network. This role involves research and development in high-performance accelerator chip architecture and high-performance interconnection protocols, aiming to push the limits of performance and scalability in traditional compute platforms.

Responsibilities

• Research the development trends and essential technologies in next-generation communication/computing/storage networks, including high-performance HPC/storage/AI training and inference networks, accelerator chip architecture, and high-performance interconnection protocols.
• Conduct innovative research in micro/macro architecture, chips and systems, as well as software/hardware and algorithms.
• Support the optimization and evolution of next-generation network chip architecture and computing hardware infrastructure based on data center scenarios and service features.

Requirements

• PhD in Computer Science, Electrical Engineering, Computer Engineering, or a closely related field.
• Strong background in interconnection networks and computer architecture is essential.
• Demonstrated research expertise in one or more of the following areas:
  • High-performance accelerator chip architecture and high-performance interconnection protocols
  • Network-on-Chip (NoC) architecture, including routing, flow control, topologies, and performance modeling
  • Programming models and hardware/software interfaces (e.g., load/store, message-passing, RDMA, shared memory models)
  • System-level modeling and simulation (e.g., cycle-accurate simulators)
• Proven publication record in relevant peer-reviewed venues.
• Excellent analytical, problem-solving, and system-level thinking skills.
• Strong verbal and written communication skills in English, with the ability to work both independently and collaboratively in a cross-disciplinary team.

Apply online using the form below. Please note that only applications matching the job profile will be considered.