Analog Design Engineer / Analog Design Engineeress

Analog Design Engineer at Kandou

At Kandou, we are redefining the economics of AI infrastructure. Our mission is to democratize AI by significantly reducing the Total Cost of Ownership (TCO) of hardware systems — a critical barrier to scalable adoption.

Our proprietary MIMO-over-copper technology powers a high-performance, chiplet-based AI memory fabric that is both scalable and energy-efficient. Unlike traditional interconnects, our solution significantly reduces power consumption while preserving high bandwidth and ultra-low latency — unlocking unprecedented efficiency for AI training and inference at scale.

Kandou’s architecture is not just an incremental improvement; it’s a foundational shift in how AI hardware is built for the future.

Key Responsibilities

• Design, model, and verify custom analog designs for high-speed Serdes transceivers in advanced technology nodes.
• Develop and verify analog circuits, adhering to prescribed design and documentation flows to meet architectural specifications.
• Support and interact with customers regarding requirements, design specifications, performance results, and product delivery as needed.
• Assist in analog IP and chip-level integration.
• Collaborate with architects, technical leads, analog and digital design teams, layout specialists, integration teams, verification teams, and quality teams as necessary.

Competencies

• Proficient in designing high-speed analog SerDes circuits, including DFT, DFM, and ESD protection, with a deep understanding of transistor and wireline communications fundamentals.
• Knowledgeable in layout approaches and design techniques for high-speed and high-precision circuits.
• Advanced user of EDA tools for design and verification of analog circuits, preferably within the Cadence Virtuoso environment, including simulation, parasitic extraction, electromagnetic modeling, EM/IR and reliability analysis, as well as LVS and DRC.
• Self-motivated with a strong sense of ownership and responsibility; excellent verbal and written communication skills, and a collaborative team player.
• Able to manage and complete designs according to schedule using defined design process flows and report design status to the internal management team.

Requirements

• A Master's or Ph.D. degree in Electronics or a related field.
• Minimum of 5 years of experience in analog design and layout of key circuits in multi-gigabit serial data-link transceivers or RF multi-tone communications, including equalizers, clock generators, clock and data recovery circuits, TISAR ADCs, serializers, and output drivers, among others.
• Expertise in the design and layout of high-speed circuits such as oscillators, phase-locked loops, delay-locked loops, and other fundamental building blocks including biasing, amplifiers, buffers, regulators, filters, ADCs, and DACs.
• Experience with modern semiconductor process technologies, preferably in finFET technology nodes.
• Experience using Ocean, MDL, or equivalent tools to automate analog design verification is highly desirable.

If this is the role you have been looking for and want to be part of a growing company with an exciting future, we would love to hear from you. Together, We Kandou It!

Apply online using the form below. Please note that only applications matching the job profile will be considered.

Visit us at www.kandou.ai and connect with us on LinkedIn.