Join Our Team at Kandou
At Kandou, we are redefining the economics of AI infrastructure. Our mission is to democratize AI by significantly reducing the Total Cost of Ownership (TCO) of hardware systems — a critical barrier to scalable adoption.
Our proprietary MIMO-over-copper technology powers a high-performance, chiplet-based AI memory fabric that is both scalable and energy-efficient. Unlike traditional interconnects, our solution significantly reduces power consumption while preserving high bandwidth and ultra-low latency — unlocking unprecedented efficiency for AI training and inference at scale.
Kandou’s architecture represents not just an incremental improvement but a foundational shift in how AI hardware is built for the future.
Job Title: Mixed Signal Verification Engineer
Key Responsibilities:
- Verification planning tasks in an analog/mixed signal environment related to high-speed SerDes designs.
- Debugging and flagging issues in collaboration with the design team.
- Enhancing and developing new methodologies in partnership with the verification team and EDA vendors.
- Documenting and tracking verification plan tasks, bug findings, and methodology efforts.
Skills:
- Proficient scripting techniques.
- Strong understanding of fabrication processes, process corners, simulation, and verification setup.
- Exceptional knowledge of electrical and discrete test benches/solvers with a focus on run time optimization.
- In-depth familiarity with simulation tools and debugging techniques.
- Understanding of revision control systems.
- Excellent communication and reporting skills.
Experience:
- Minimum of 10 years of experience in digital/mixed signal/analog verification, including test bench design, connecting modules, and design electrical/discrete partitioning.
- Experience with behavioral modeling and basic knowledge of analog building blocks.
- Proficiency with simulators: fast analog solvers (e.g., Cadence APS, SpectreX) and digital solvers (e.g., Cadence Xcelium).
- Familiarity with constrained random testbench development.
- Experience with System Verilog Assertions.
- Knowledge of Cadence Ocean Script.
- Experience with the Cadence Virtuoso Framework: Schematic editor, Assembler, AMS.
- Knowledge of high-speed communication systems such as SerDes is a plus.
- A solid background in digital verification with some exposure to Specman/SV UVM and/or analog verification is beneficial.
Education:
Bachelor's degree in Electrical Engineering.
If this is the role you have been looking for and you desire to be part of a growing company with an exciting future, we would love to hear from you. Together, We Kandou It!
Apply online using the form below.
Visit us at www.kandou.ai and follow us on LinkedIn.
Note: Only applications matching the job profile will be considered.