Join Our Team at Kandou
At Kandou, we are redefining the economics of AI infrastructure. Our mission is to democratize AI by significantly reducing the Total Cost of Ownership (TCO) of hardware systems — a critical barrier to scalable adoption.
Our proprietary MIMO-over-copper technology powers a high-performance, chiplet-based AI memory fabric that is both scalable and energy-efficient. Unlike traditional interconnects, our solution significantly reduces power consumption while preserving high bandwidth and ultra-low latency — unlocking unprecedented efficiency for AI training and inference at scale.
Kandou’s architecture is not just an incremental improvement — it represents a foundational shift in how AI hardware is built for the future.
Job Title: Mixed Signal Verification Engineer
Key Responsibilities:
- Verification plan tasks in analog/mixed signal environments related to high-speed SerDes designs.
- Debug and report issues in collaboration with the design team.
- Enhance and develop new methodologies alongside the verification team and EDA vendors.
- Document and track verification plan tasks, bug findings, and methodology work.
Skills:
- Proficient scripting techniques.
- Strong understanding of fabrication processes, process corners, simulation, and verification setups.
- Excellent knowledge of electrical and discrete test benches/solvers with an emphasis on runtime optimization.
- Thorough familiarity with simulation tools and debugging techniques.
- Comprehensive understanding of revision control.
- Strong communication and reporting skills.
Experience:
- At least 10 years of experience in digital/mixed signal/analog verification including test bench design, module connections, and electrical/discrete partitioning.
- Experience in behavioral modeling and fundamental knowledge of analog building blocks.
- Proficient with simulators, including fast analog solvers (e.g., Cadence APS, SpectreX) and digital solvers (e.g., Cadence Xcelium).
- Experience in constrained random testbench development.
- Familiarity with System Verilog Assertions.
- Experience with Cadence Ocean Script and the Cadence Virtuoso Framework (Schematic editor, Assembler, AMS).
- Knowledge of high-speed communication systems, such as SerDes, is a plus.
- A strong digital verification background with exposure to Specman/SV UVM and/or analog verification.
Education:
- Bachelor's degree in Electrical Engineering or equivalent experience.
If this is the role you have been looking for and you want to be part of a growing company with an exciting future, we would love to hear from you. Apply online using the form below. Please note that only applications matching the job profile will be considered.
Together, We Kandou It!
Visit us at www.kandou.ai and Kandou on LinkedIn.