Full-Time Position Available Immediately or by Agreement
Challenges are our drive, innovation our calling. At Kandou, we are a team of passionate, accomplished professionals making a mark in the semiconductor industry. As an innovative leader in high-speed and energy-efficient chip-chip link solutions, we are critical to the evolution of the electronics industry, continuously developing to meet the demands of not only today’s customers but tomorrow’s as well. If you're eager to be part of a high-tech scale-up and motivated by pushing your limits and challenging the status quo, we have an exciting opportunity for you.
Position: Formal Verification Engineer
We are actively seeking a resourceful Formal Verification Engineer, based in either Lausanne, Switzerland; the UK (Reading/Northampton); Germany (Dortmund); or Denmark.
Key Responsibilities
- Develop formal verification methodologies and best practices
- Participate in RTL design reviews
- Prepare design verification plans based on design specifications
- Document results and coverage metrics for formal sign-off
- Plan and schedule assigned projects for timely completion
- Maintain design verification environment and track & close design bugs
Skills
- Excellent communication skills, analytical mindset, and a strong team player
- Proficiency in scripting techniques (Python, Perl, or TCL for automation), regression setup, and management
- Deep understanding of Formal Verification technologies
- Strong knowledge of metrics-driven verification (including test planning and coverage closure)
- Proficiency in temporal logic assertion-based languages such as SVA or PSL
- Familiarity with traditional simulation-based verification methodologies (a plus)
- Exceptional analytical, problem-solving, and debugging skills
- Strong understanding of instruction-set architectures, interrupt handling, and bus architectures
- Knowledge of Cadence JasperGold and VManager is preferred
Experience
- 5+ years of experience in the semiconductor industry
- Proven track record in verifying complex designs (preferably in high-volume applications) - FPGA or ASIC
- Adept at balancing quality and schedule
- Experience collaborating with RTL design engineers to develop formal micro-architecture specifications
- Familiarity with SerDes and high-level protocols (e.g., PCIe, USB, DP) would be advantageous
- Delivered reusable and optimized formal models and verification codebases to improve efficiency across projects
Education
- Bachelor of Engineering in Electronics and Electrical Engineering (equivalent or higher)
If this role matches what you have been looking for and you wish to be part of a growing company with an exciting future, we would love to hear from you. Together, We Kandou It!
Apply online using the form below. Please note that only applications matching the job profile will be considered.
Visit us at www.kandou.ai and Kandou on LinkedIn.