Formal Verification Engineer
We are thrilled to introduce an exciting opportunity to join Kandou, an innovative leader in high-speed and energy-efficient chip-chip link solutions. With a commitment to shaping the future of the semiconductor industry, our team of passionate professionals is dedicated to developing cutting-edge technologies that meet the demands of today and tomorrow. If you are eager to challenge the status quo and thrive in a high-tech scale-up environment, this role might be perfect for you.
We are actively seeking a resourceful Formal Verification Engineer, who can be based in Lausanne, Switzerland, or in the UK (Reading/Northampton), Germany (Dortmund), or Denmark.
Key Responsibilities
- Develop formal verification methodologies and best practices.
- Participate in RTL design reviews.
- Prepare design verification plans based on design specifications.
- Document results and coverage metrics for formal sign-off.
- Plan and schedule assigned projects for timely completion.
- Maintain design verification environment and track & close design bugs.
Skills
- Excellent communication skills, analytical mindset, and a strong team player.
- Proficient in scripting techniques (Python, Perl, or TCL for automation) and regression setup management.
- Deep understanding of Formal Verification technologies.
- Strong knowledge of metrics-driven verification, including test planning and coverage closure.
- Proficient in temporal logic assertion-based languages such as SVA or PSL.
- Familiarity with traditional simulation-based verification methodologies is a plus.
- Exceptional analytical, problem-solving, and debugging skills.
- Strong understanding of instruction-set architectures, interrupt handling, and bus architectures.
- Knowledge of Cadence JasperGold and VManager is preferable.
Experience
- 5+ years of experience in the semiconductor industry.
- Proven track record in verifying complex designs (preferably in high-volume applications) - FPGA or ASIC.
- Able to make trade-offs between quality and schedule.
- Experience working with RTL design engineers to develop formal micro-architecture specifications.
- Familiarity with SerDes and high-level protocols (e.g., PCIe, USB, DP) is advantageous.
- Delivered reusable and optimized formal models and verification codebases to enhance project efficiency.
Education
- Bachelor of Engineering in Electronics and Electrical Engineering (or equivalent higher degree).
If you are interested in being part of a growing company with an exciting future, we would love to hear from you. Apply online using the form below. Please note that only applications matching the job profile will be considered.
Together, We Kandou It!
For more information about us, visit www.kandou.ai and follow us on LinkedIn.