Job Opportunity: Analog Design Engineer
At Kandou, we are redefining the economics of AI infrastructure. Our mission is to democratize AI by significantly reducing the Total Cost of Ownership (TCO) of hardware systems—a critical barrier to scalable adoption.
Our proprietary MIMO-over-copper technology powers a high-performance, chiplet-based AI memory fabric that is both scalable and energy-efficient. Unlike traditional interconnects, our solution significantly reduces power consumption while preserving high bandwidth and ultra-low latency—unlocking unprecedented efficiency for AI training and inference at scale.
Kandou’s architecture is not just an incremental improvement—it’s a foundational shift in how AI hardware is constructed for the future.
Key Responsibilities:
- Design, model, and verify custom analog designs for high-speed SerDes transceivers in advanced technology nodes.
- Create and validate analog circuits while adhering to prescribed design and documentation flows to meet architectural specifications.
- Interact with customers regarding requirements, design specifications, performance results, and product delivery as necessary.
- Support analog IP and chip-level integration.
- Collaborate with architects, technical leads, and various design and validation teams as needed.
Competencies:
- Expertise in designing high-speed analog SerDes circuits, including DFT, DFM, and ESD protection, with a solid understanding of transistor and wireline communications fundamentals.
- Knowledge of layout approaches and design techniques for high-speed and high-precision circuits.
- Proficient in using EDA tools for analog circuit design and verification, preferably within the Cadence Virtuoso environment, including simulation, parasitic extraction, electromagnetic modeling, EM/IR reliability analysis, as well as LVS and DRC.
- Self-motivated with a strong sense of ownership and responsibility, excellent verbal and written communication skills, and a collaborative spirit.
- Able to manage and complete designs according to schedule using defined design process flows and report design status to the internal management team.
Requirements:
- A Master’s or Ph.D. degree in Electronics or a relevant field.
- A minimum of 5 years of experience in analog design and layout of key circuits in multi-gigabit serial data-link transceivers or RF multi-tone communications.
- Expertise in designing and laying out high-speed circuits, including oscillators, phase-locked loops, delay-locked loops, and fundamental building blocks such as biasing, amplifiers, buffers, regulators, filters, ADCs, and DACs.
- Experience with modern semiconductor process technologies, preferably in finFET technology nodes.
- Experience utilizing Ocean, MDL, or equivalent for automated analog design verification is highly desirable.
If this role aligns with your ambitions and you wish to be part of an innovative and growing company, we would love to hear from you. Apply online using the form below. Please note that only applications matching the job profile will be considered.
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