Join Our Team as an Analog Design Engineer
CDI to 100% immediately or to be agreed.
At Kandou, we are redefining the economics of AI infrastructure. Our mission is to democratize AI by significantly reducing the Total Cost of Ownership (TCO) of hardware systems — a critical barrier to scalable adoption.
Our proprietary MIMO-over-copper technology powers a high-performance, chiplet-based AI memory fabric that is both scalable and energy-efficient. Unlike traditional interconnects, our solution reduces power consumption significantly while preserving high bandwidth and ultra-low latency — unlocking unprecedented efficiency for AI training and inference at scale.
Kandou’s architecture is not just an incremental improvement — it represents a foundational shift in how AI hardware is built for the future.
Key Responsibilities
- Design, model, and verify custom analog designs for high-speed SerDes transceivers in advanced technology nodes.
- Design and verify analog circuits, following prescribed design and documentation flows to meet architecture specifications.
- If necessary, support and interact with customers on requirements, design specifications, performance results, and product delivery.
- Support analog IP and chip-level integration.
- Collaborate with architects, technical leads, analog and digital design teams, layout, integration, verification, silicon validation, and quality teams as needed.
Competencies
- Expertise in the design of high-speed analog SerDes circuits, including DFT, DFM, and ESD protection, with a deep understanding of transistor and wireline communications fundamentals.
- Comprehension of layout approaches and design techniques used for high-speed and high-precision circuits.
- Advanced proficiency in EDA tools for the design and verification of analog circuits, preferably using the Cadence Virtuoso environment.
- Self-motivated with a strong sense of ownership and responsibility, possessing good verbal and written communication skills, and a collaborative spirit.
- Ability to manage and complete designs on schedule using defined design process flows, as well as reporting design status to the internal management team.
Requirements
- A Master’s or Ph.D. degree in Electronics or other relevant fields.
- Minimum 5 years of experience in analog design and layout of key circuits in multi-gigabit serial data-link transceivers or RF multi-tone communications, such as equalizers, clock generators, clock and data recovery circuits, TISAR ADCs, serializers, and output drivers.
- Expertise in design and layout of high-speed circuits such as oscillators, phase-locked loops, delay-locked loops, and other fundamental building blocks like biasing, amplifiers, buffers, regulators, filters, ADCs, DACs, etc.
- Experience with modern semiconductor process technologies, preferably in finFET technology nodes.
- Experience using Ocean, MDL, or equivalent to automate analog design verification is highly desirable.
If this is the role you have been looking for and want to be part of a growing company with an exciting future, we would love to hear from you. Apply online using the form below. Please note that only applications matching the job profile will be considered.
Together We Kandou It!
Visit us at www.kandou.ai and Kandou on LinkedIn.