CDI Position - Analog Design Engineer
Our challenges drive us, and innovation is our calling. At Kandou, we are a team of passionate and accomplished professionals making a significant impact in the semiconductor industry. As a leader in high-speed and energy-efficient chip-to-chip link solutions, we are committed to evolving alongside our customers, not only for today’s demands but for those of tomorrow as well. If you're eager to be part of a high-tech scale-up and are motivated by pushing your limits and challenging the status quo, we have an exciting opportunity for you.
We are actively seeking an Analog Design Engineer, based in Lausanne, Switzerland.
Key Responsibilities
- Design, model, and verify custom analog designs for high-speed SerDes transceivers in advanced technology nodes.
- Design and verify analog circuits according to prescribed design and documentation flows to meet architectural specifications.
- Support and collaborate with customers on requirements, design specifications, performance results, and product delivery as needed.
- Assist in analog IP and chip-level integration.
- Work collaboratively with architects, technical leads, and teams in analog and digital design, layout, integration, verification, silicon validation, and quality.
Competencies
- Skilled in designing high-speed analog SerDes circuits, including DFT, DFM, and ESD protection, with thorough knowledge of transistor and wireline communications fundamentals.
- Understanding of layout approaches and design techniques used for high-speed and high-precision circuits.
- Advanced user of EDA tools for the design and verification of analog circuits, preferably in the Cadence Virtuoso environment, and experienced in simulation, parasitic extraction, electromagnetic modeling, EM/IR analysis, reliability analysis, as well as LVS and DRC.
- Self-motivated with a strong sense of ownership and responsibility, possessing good verbal and written communication skills, and capable of being an effective team player.
- Ability to manage and complete designs on schedule while adhering to defined design process flows and reporting design status to the internal management team.
Requirements
- Master's or Ph.D. in Electronics or a related field.
- Minimum of 5 years of experience in analog design and layout of key circuits in multi-gigabit serial data-link transceivers or RF multi-tone communication, such as equalizers, clock generators, clock and data recovery circuits, TISAR ADCs, serializers, and output drivers.
- Expertise in the design and layout of high-speed circuits including oscillators, phase-locked loops, delay-locked loops, as well as other fundamental building blocks such as biasing, amplifiers, buffers, regulators, filters, ADCs, and DACs.
- Experience with modern semiconductor process technologies, preferably in FinFET technology nodes.
- Proficient in using Ocean, MDL, or equivalent tools for automating analog design verification is highly desirable.
If this is the role you’ve been looking for and you want to join a growing company with an exciting future, we’d love to hear from you. Apply online using the form below. Please note that only applications matching the job profile will be considered.
Together We Kandou It!
Visit us at www.kandou.ai and on LinkedIn.