Analog Design Engineer Position
Join Kandou, an innovative leader in high-speed and energy-efficient chip-to-chip link solutions that are critical to the evolution of the electronics industry. We are a team of passionate and accomplished professionals dedicated to meeting the demands of today's customers while also anticipating the needs of tomorrow. If you thrive in a high-tech scale-up environment and are motivated to push boundaries and challenge the status quo, we have an exciting opportunity for you!
We are actively seeking an Analog Design Engineer, based in Lausanne, Switzerland.
Key Responsibilities
- Design, model, and verify custom analog designs for high-speed SERDES transceivers in advanced technology nodes.
- Follow prescribed design and documentation flows to meet architecture specifications for analog circuits.
- Engage with customers on requirements, design specifications, performance results, and product delivery as needed.
- Support analog IP and chip-level integration.
- Collaborate with architects, technical leads, and various teams encompassing analog and digital design, layout, integration, verification, silicon validation, and quality.
Competencies
- Proficient in the design of high-speed analog SERDES circuits, including DFT, DFM, and ESD protection, with a strong foundation in transistor and wireline communication fundamentals.
- Understanding of layout approaches and design techniques used for high-speed and high-precision circuits.
- Advanced user of EDA tools for the design and verification of analog circuits, preferably within the Cadence Virtuoso environment, including simulations, parasitic extraction, electromagnetic modeling, EM/IR analysis, and reliability analysis, as well as LVS and DRC.
- Self-motivated with a strong sense of ownership and responsibility, combined with excellent verbal and written communication skills and a collaborative spirit.
- Able to manage and complete designs according to schedule using defined design processes, and provide design status updates to the internal management team.
Requirements
- A Master's or Ph.D. degree in Electronics or a related field.
- A minimum of 5 years of experience in analog design and layout of key circuits in multi-gigabit serial data-link transceivers or RF multi-tone communications such as equalizers, clock generators, clock and data recovery circuits, TISAR ADCs, serializers, and output drivers.
- Expertise in the design and layout of high-speed circuits such as oscillators, phase-locked loops, and delay-locked loops, along with fundamental building blocks like biasing, amplifiers, buffers, regulators, filters, ADCs, and DACs.
- Experience with modern semiconductor process technologies, preferably in finFET technology nodes.
- Familiarity with Ocean, MDL, or equivalent tools for automating analog design verification is highly desirable.
If you are excited about this opportunity and want to be part of a company with a promising future, we would love to hear from you. Apply online using the form below. Please note that only applications matching the job profile will be considered.
To learn more about us, visit www.kandou.ai and connect with us on LinkedIn.