Advanced R&D Analog Design Engineer / Advanced R&D Analog Design Engineeress

Kandou Bus SA - July 11, 2026

Job Opportunity: Analog Design Engineer (Advanced Research and Development Department)

At Kandou, we are redefining the economics of AI infrastructure. Our mission is to democratize AI by significantly reducing the Total Cost of Ownership (TCO) of hardware systems—a critical barrier to scalable adoption.

Our proprietary MIMO-over-copper technology powers a high-performance, chiplet-based AI memory fabric that is both scalable and energy-efficient. Unlike traditional interconnects, our solution dramatically reduces power consumption while preserving high bandwidth and ultra-low latency—unlocking unprecedented efficiency for AI training and inference at scale.

Kandou’s architecture is not just an incremental improvement; it represents a foundational shift in how AI hardware is built for the future.

Key Responsibilities:

  • Develop block-level specifications and models for target designs.
  • Model, design, and verify the performance of custom analog circuits in advanced technology nodes.
  • Oversee layout design and development, including floor-planning, guiding layout engineers, and post-layout verification.
  • Conduct design verification at various levels (pre- and post-layout, variation-aware).
  • Support and collaborate with the design team, including other design and layout engineers, architects, and chip-level integration engineers.
  • Assist with post-silicon lab bring-up, debug, characterization, and productization.
  • Produce comprehensive reports, including progress, analysis, design, modeling, and verification reports.
  • Participate in developing concept-level architectures and circuits.

Skills Required:

  • Deep understanding of design and layout techniques for high-speed and high-precision circuits.
  • Excellent problem-solving and analytical skills.
  • Experience in developing test benches and simulation setups to analyze the performance of target circuits and systems.
  • Proficient in layout techniques, such as matching, parasitic estimation and reduction, and addressing deep-submicron issues.
  • Advanced user of EDA tools for design and verification, preferably Cadence Virtuoso, Spectre/HSpice, Calibre/PVS DRC/LVS, parasitic extraction and modeling, EM and IR drop tools, and ESD analysis.
  • Self-motivated with a strong sense of ownership and responsibility.
  • Ability to manage workload and schedules and report to internal management and technical teams.
  • Excellent communication and reporting skills.

Experience Required:

  • 5+ years of experience in the design and layout of analog and mixed-signal circuits, particularly high-speed and high-precision circuits, including multi-gigabit serial data-link transceivers, RF circuits, equalizers, clock generators, PLLs, clock and data recovery circuits, and data converters (ADC or DAC).
  • MSc or PhD in electronics/electrical engineering (or equivalent).
  • Experience with modern semiconductor process technologies, such as CMOS 28nm and FinFET 16/14nm, 7nm.
  • Familiarity with high-level modeling, top-level simulations, and signal integrity.
  • Solid background in Signal Processing and Communications.

If this is the role you have been looking for and you want to be part of a growing company with an exciting future, we would love to hear from you. Apply online using the form below. Please note that only applications matching the job profile will be considered.

Together, We Kandou It!

Location : St-Sulpice VD
Country : Switzerland

Application Form

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