Advanced R&D Analog Design Engineer / Advanced R&D Analog Design Engineeress

Kandou Bus SA - April 22, 2026

Join Our Team as an Analog Design Engineer

Kandou is at the forefront of redefining the economics of AI infrastructure. Our mission is to democratize AI by significantly reducing the Total Cost of Ownership (TCO) of hardware systems — a critical barrier to scalable adoption.

Our proprietary MIMO-over-copper technology powers a high-performance, chiplet-based AI memory fabric that is both scalable and energy-efficient. Unlike traditional interconnects, our solution drastically reduces power consumption while preserving high bandwidth and ultra-low latency, unlocking unprecedented efficiency for AI training and inference at scale.

Kandou’s architecture represents not just an incremental improvement, but a foundational shift in how AI hardware is constructed for the future.

Position Overview

Job Title: Analog Design Engineer (Advanced Research and Development Department)

Key Responsibilities

  • Develop block-level specifications and models for target designs.
  • Create, model, design, and verify the performance of custom analog circuits in advanced technology nodes.
  • Oversee layout design and development, including floor-planning, guiding layout engineers, and performing post-layout verification.
  • Conduct design verification at various levels (pre- and post-layout, variation-aware).
  • Collaborate with the design team, including design and layout engineers, architects, and chip-level integration engineers.
  • Support post-silicon lab bring-up, debug, characterization, and productization.
  • Produce various reports, including progress reports and analysis of design, modeling, and verification results.
  • Participate in developing concept-level architectures and circuits.

Required Skills

  • In-depth knowledge of design and layout techniques for high-speed and high-precision circuits.
  • Proven problem-solving abilities and excellent analytical skills.
  • Experience in developing testbenches and simulation setups for performance analysis of target circuits and systems.
  • Proficient in layout techniques, including matching, parasitic estimation and reduction, and deep-submicron related issues.
  • Advanced user of EDA tools for design and verification, preferably including Cadence Virtuoso, Spectre/HSpice, Calibre/PVS DRC/LVS, and EM analysis tools.
  • Self-motivated with a strong sense of ownership and responsibility.
  • Ability to manage workload, schedules, and report to internal management and technical teams.
  • Excellent communication and reporting skills.

Experience Required

  • 5+ years of experience in the design and layout of analog and mixed-signal circuits, focusing on high-speed and high-precision applications (e.g., multi-gigabit serial data-link transceivers, RF circuits, clock recovery circuits).
  • MSc or PhD in electronics/electrical engineering (or equivalent).
  • Familiarity with modern semiconductor process technologies, such as CMOS 28nm, FinFET 16/14nm, and 7nm.
  • Experience in high-level modeling, top-level simulations, and signal integrity.
  • Strong background in Signal Processing and Communications.

If this role aligns with your career aspirations and you are eager to contribute to a dynamic company with a promising future, we would love to hear from you.

Apply online using the form below. Please note that only applications matching the job profile will be considered.

Location : St-Sulpice VD
Country : Switzerland

Application Form

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